valentine

matrix.rs (23136B)

---

 //! The mixer matrix, routing matrix (mux), and metering — the three parts of the
 //! device that aren't simple config offsets. Request/response framing transcribed
 //! from the kernel driver and confirmed against the gen3 device.
 //!
 //! - **Mixer**  (`GET_MIX`/`SET_MIX`): per mix bus, a `u16` gain for each input.
 //! - **Routing** (`GET_MUX`/`SET_MUX`): a flat list of `u32` entries, each packing
 //!   `destination | (source << 12)` — destination in the low 12 bits, source in
 //!   the high 12 (confirmed against the kernel's `populate_mux`/`set_mux`).
 //! - **Meters** (`GET_METER`): a snapshot of `u32` levels, one per metering point.
 
 use crate::protocol::{op, Scarlett};
 use crate::transport::{Transport, TransportError};
 
 /// Mixer crosspoint gain range, in dB (−80 … +12, matching the device).
 pub const MIXER_MIN_DB: f32 = -80.0;
 pub const MIXER_MAX_DB: f32 = 12.0;
 /// Raw mixer value that means 0 dB (unity). The device's curve is
 /// `value = 8192 · 10^(dB/20)` (confirmed from the kernel's generating formula).
 const MIXER_UNITY: f32 = 8192.0;
 
 /// Convert a raw mixer value (as returned by [`Scarlett::get_mix`]) to dB,
 /// clamped to the device's range. 0 → silence floor (`MIXER_MIN_DB`).
 pub fn mixer_value_to_db(value: u16) -> f32 {
     if value == 0 {
         return MIXER_MIN_DB;
     }
     (20.0 * (value as f32 / MIXER_UNITY).log10()).clamp(MIXER_MIN_DB, MIXER_MAX_DB)
 }
 
 /// Convert a dB gain to the raw mixer value for [`Scarlett::set_mix`].
 pub fn db_to_mixer_value(db: f32) -> u16 {
     let db = db.clamp(MIXER_MIN_DB, MIXER_MAX_DB);
     (MIXER_UNITY * 10f32.powf(db / 20.0)) as u16
 }
 
 /// Bit shift separating source (high bits) from destination (low bits).
 const MUX_SRC_SHIFT: u32 = 12;
 /// Mask for the destination field (low 12 bits).
 const MUX_DST_MASK: u32 = (1 << MUX_SRC_SHIFT) - 1;
 
 /// One routing assignment: which `source` feeds which `dest` (sink). Both are
 /// device-internal hardware port IDs.
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
 pub struct MuxEntry {
     pub source: u16,
     pub dest: u16,
 }
 
 impl MuxEntry {
     /// Pack into the device's `dest | (source << 12)` u32.
     pub fn pack(self) -> u32 {
         (self.dest as u32 & MUX_DST_MASK) | ((self.source as u32) << MUX_SRC_SHIFT)
     }
 
     /// Unpack a device u32 into source/dest.
     pub fn unpack(raw: u32) -> Self {
         MuxEntry {
             dest: (raw & MUX_DST_MASK) as u16,
             source: (raw >> MUX_SRC_SHIFT) as u16,
         }
     }
 }
 
 /// A set of output channels that can be monitored "via the mixer" so a software
 /// fader controls their level. Each channel `i` (0..count) uses output hardware
 /// id `out_id_base+i`, mix bus `bus_base+i`, mixer-input `mix_in_base+i`, fed by
 /// PCM `pcm_base+i`. Bases are chosen so groups don't collide on buses/inputs.
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
 pub struct MonitorGroup {
     pub name: &'static str,
     pub out_id_base: u16, // hardware id of first output (e.g. 0x080 analogue, 0x200 ADAT)
     pub bus_base: u16,    // first mix bus index (0-based)
     pub mix_in_base: u16, // first mixer-input index (0-based)
     pub pcm_base: u16,    // first PCM source index (0-based; matches the DAW channel)
     pub count: u16,       // number of channels
 }
 
 /// The 18i20 g3 monitor groups. Analogue 1-2 on buses 0-1 / mixer-in 0-1 / PCM
 /// 1-2; ADAT 1-8 on buses 2-9 / mixer-in 2-9 / PCM 13-20 (the user's ADAT
 /// monitoring path). Non-overlapping so both can be active at once (10 of 12
 /// buses, 10 of 25 mixer-inputs).
 pub const MONITOR_GROUPS: &[MonitorGroup] = &[
     MonitorGroup {
         name: "Analogue 1-2",
         out_id_base: 0x080,
         bus_base: 0,
         mix_in_base: 0,
         pcm_base: 0, // PCM 1-2
         count: 2,
     },
     MonitorGroup {
         name: "ADAT 1-8",
         out_id_base: 0x200,
         bus_base: 2,
         mix_in_base: 2,
         pcm_base: 12, // PCM 13-20
         count: 8,
     },
 ];
 
 /// Convenience operations layered on a connected [`Scarlett`].
 impl<T: Transport> Scarlett<T> {
     /// Read the input gains feeding mix bus `mix_num`. Returns one raw `u16`
     /// mixer value per input (`num_inputs`); convert to dB with the device's
     /// mixer curve at the UI layer.
     pub fn get_mix(&mut self, mix_num: u16, num_inputs: usize) -> Result<Vec<u16>, TransportError> {
         // Request is { mix_num: u16, count: u16 } (the kernel sends both; sending
         // only mix_num gets device error 0x9).
         let mut req = Vec::with_capacity(4);
         req.extend_from_slice(&mix_num.to_le_bytes());
         req.extend_from_slice(&(num_inputs as u16).to_le_bytes());
         let resp = self.command(op::GET_MIX, &req, num_inputs * 2)?;
         Ok(le_u16s(&resp.payload, num_inputs))
     }
 
     /// Set every input gain for mix bus `mix_num` at once (raw mixer `u16`s).
     pub fn set_mix(&mut self, mix_num: u16, levels: &[u16]) -> Result<(), TransportError> {
         let mut payload = Vec::with_capacity(2 + levels.len() * 2);
         payload.extend_from_slice(&mix_num.to_le_bytes());
         for &l in levels {
             payload.extend_from_slice(&l.to_le_bytes());
         }
         self.command(op::SET_MIX, &payload, 0)?;
         Ok(())
     }
 
     /// Route a monitor group's outputs THROUGH the mixer so their level is
     /// controllable by a software fader: for each channel `i`,
     /// `MixerIn(mix_in_base+i) ← PCM(pcm_base+i)` and `Out(out_hw+i) ← Mix(bus_base+i)`.
     /// With [`Self::set_group_level`], the buses' gains are the group's volume.
     /// One atomic routing write. See [`MonitorGroup`].
     pub fn route_group_via_mixer(
         &mut self,
         pc: [(u16, u16); 6],
         g: &MonitorGroup,
     ) -> Result<crate::mux::MuxState, TransportError> {
         use crate::mux::{id_to_num, Dir};
         let n = |dir, id| id_to_num(&pc, dir, id).unwrap_or(0);
         let mut changes = Vec::with_capacity(g.count as usize * 2);
         for i in 0..g.count {
             // MixerIn(base+i) ← PCM(pcm_base+i)
             changes.push((
                 n(Dir::Out, 0x300 + g.mix_in_base + i),
                 n(Dir::In, 0x600 + g.pcm_base + i),
             ));
             // Out(base+i) ← Mix(bus_base+i)
             changes.push((
                 n(Dir::Out, g.out_id_base + i),
                 n(Dir::In, 0x300 + g.bus_base + i),
             ));
         }
         self.set_routes(pc, &changes)
     }
 
     /// Route a group's outputs straight from the DAW again
     /// (`Out(out_hw+i) ← PCM(pcm_base+i)`), undoing [`Self::route_group_via_mixer`].
     pub fn route_group_direct(
         &mut self,
         pc: [(u16, u16); 6],
         g: &MonitorGroup,
     ) -> Result<crate::mux::MuxState, TransportError> {
         use crate::mux::{id_to_num, Dir};
         let n = |dir, id| id_to_num(&pc, dir, id).unwrap_or(0);
         let changes: Vec<(u16, u16)> = (0..g.count)
             .map(|i| (n(Dir::Out, g.out_id_base + i), n(Dir::In, 0x600 + g.pcm_base + i)))
             .collect();
         self.set_routes(pc, &changes)
     }
 
     /// Set a group's level (dB): each of the group's buses passes only its own
     /// mixer-input at `db`; all other inputs on those buses are silenced for a
     /// clean monitor path. `inputs` = mixer input count.
     pub fn set_group_level(
         &mut self,
         g: &MonitorGroup,
         db: f32,
         inputs: usize,
     ) -> Result<(), TransportError> {
         let v = db_to_mixer_value(db);
         for i in 0..g.count {
             let mut bus = vec![0u16; inputs];
             let in_idx = (g.mix_in_base + i) as usize;
             if in_idx < inputs {
                 bus[in_idx] = v;
             }
             self.set_mix(g.bus_base + i, &bus)?;
         }
         Ok(())
     }
 
     /// Read a group's current level (dB) — the gain of its first bus on its
     /// first mixer-input. Meaningful only when the group is routed via the mixer.
     pub fn get_group_level(
         &mut self,
         g: &MonitorGroup,
         inputs: usize,
     ) -> Result<f32, TransportError> {
         let raw = self.get_mix(g.bus_base, inputs)?;
         let idx = g.mix_in_base as usize;
         Ok(raw.get(idx).map(|&v| mixer_value_to_db(v)).unwrap_or(MIXER_MIN_DB))
     }
 
     /// True if a group is currently routed via the mixer (its first output is fed
     /// by its first mix bus).
     pub fn group_is_via_mixer(
         &mut self,
         pc: [(u16, u16); 6],
         g: &MonitorGroup,
     ) -> Result<bool, TransportError> {
         use crate::mux::{id_to_num, Dir, MuxState};
         let entries = self.get_mux(crate::mux::num_dsts(&pc))?;
         let st = MuxState::from_entries(pc, &entries);
         let out0 = id_to_num(&pc, Dir::Out, g.out_id_base).unwrap_or(0);
         let bus0 = id_to_num(&pc, Dir::In, 0x300 + g.bus_base).unwrap_or(0);
         Ok(st.get(out0) == bus0)
     }
 
     /// Read the full routing table: `count` destination assignments.
     pub fn get_mux(&mut self, count: usize) -> Result<Vec<MuxEntry>, TransportError> {
         let mut payload = Vec::with_capacity(4);
         payload.extend_from_slice(&0u16.to_le_bytes()); // num (start index)
         payload.extend_from_slice(&(count as u16).to_le_bytes());
         let resp = self.command(op::GET_MUX, &payload, count * 4)?;
         Ok(le_u32s(&resp.payload, count)
             .into_iter()
             .map(MuxEntry::unpack)
             .collect())
     }
 
     /// Read the routing table and decode each entry to `(sink_name, source_name)`
     /// using [`crate::ports`]. `count` is the number of destinations to read.
     ///
     /// NOTE: read-only/display use. Editing routing needs the kernel's 3-table
     /// (per sample-rate-band) write semantics, which [`Self::set_mux`] does not
     /// yet replicate — verify on hardware before exposing edits.
     pub fn read_routing(&mut self, count: usize) -> Result<Vec<(String, String)>, TransportError> {
         Ok(self
             .get_mux(count)?
             .into_iter()
             .map(|e| {
                 (
                     crate::ports::sink_name(e.dest),
                     crate::ports::source_name(e.source),
                 )
             })
             .collect())
     }
 
     /// Change one routing assignment: route `src` (source port number, 0 = Off)
     /// to `dst` (destination port number), then write the full mux back. Reads
     /// current routing first so only the one destination changes. Returns the
     /// updated [`crate::mux::MuxState`]. Uses the hardware-verified write path.
     pub fn set_route(
         &mut self,
         pc: [(u16, u16); 6],
         dst: u16,
         src: u16,
     ) -> Result<crate::mux::MuxState, TransportError> {
         use crate::mux::{mux_assignment_18i20_gen3, num_dsts, MuxState};
         let count = num_dsts(&pc);
         let entries = self.get_mux(count)?;
         let mut state = MuxState::from_entries(pc, &entries);
         state.set(dst, src);
         let tables = state.encode_all(&mux_assignment_18i20_gen3());
         self.write_routing_tables(&tables)?;
         Ok(state)
     }
 
     /// Apply several routing changes in ONE atomic write. `changes` is a list of
     /// `(dest_port, source_port)`. All are set in the model, then the full mux is
     /// written once — so a stereo pair never passes through a half-routed state.
     pub fn set_routes(
         &mut self,
         pc: [(u16, u16); 6],
         changes: &[(u16, u16)],
     ) -> Result<crate::mux::MuxState, TransportError> {
         use crate::mux::{mux_assignment_18i20_gen3, num_dsts, MuxState};
         let count = num_dsts(&pc);
         let entries = self.get_mux(count)?;
         let mut state = MuxState::from_entries(pc, &entries);
         for &(dst, src) in changes {
             state.set(dst, src);
         }
         let tables = state.encode_all(&mux_assignment_18i20_gen3());
         self.write_routing_tables(&tables)?;
         Ok(state)
     }
 
     /// Read routing and build a map `source_hw_id -> PCM-capture channel (1-based)`
     /// for every source routed to a PCM capture destination. This is how we meter
     /// physical inputs: each input is normally routed to a DAW (PCM) capture, and
     /// the PCM-capture meters carry the real signal (the mixer-input meters only
     /// cover sources routed into the mixer). `count` = total routing destinations.
     pub fn source_to_pcm_capture(
         &mut self,
         count: usize,
     ) -> Result<std::collections::HashMap<u16, u16>, TransportError> {
         // PCM hardware destination IDs are 0x600.. ; capture channel = id & 0xff + 1.
         const PCM_BASE: u16 = 0x600;
         let mut map = std::collections::HashMap::new();
         for e in self.get_mux(count)? {
             if e.source != 0 && (e.dest & 0xf00) == PCM_BASE {
                 let pcm_ch = (e.dest - PCM_BASE) + 1; // 1-based PCM capture channel
                 map.entry(e.source).or_insert(pcm_ch);
             }
         }
         Ok(map)
     }
 
     /// Write a full routing state to the device, exactly as the kernel does:
     /// one SET_MUX message per sample-rate-band table, each carrying
     /// `{pad:u16, table:u16, data:[u32]}`. This OVERWRITES all routing.
     ///
     /// SAFETY: this is the most destructive write in the protocol — a wrong
     /// table scrambles routing until restored. Prefer [`Self::dry_run_routing`]
     /// first to inspect the exact payloads. Pass the per-table encodings from
     /// [`crate::mux::MuxState::encode_table`] over `mux::mux_assignment_*`.
     pub fn write_routing_tables(&mut self, tables: &[Vec<u32>]) -> Result<(), TransportError> {
         for (table_num, data) in tables.iter().enumerate() {
             let mut payload = Vec::with_capacity(4 + data.len() * 4);
             payload.extend_from_slice(&0u16.to_le_bytes()); // pad
             payload.extend_from_slice(&(table_num as u16).to_le_bytes()); // table index
             for v in data {
                 payload.extend_from_slice(&v.to_le_bytes());
             }
             self.command(op::SET_MUX, &payload, 0)?;
         }
         Ok(())
     }
 
     /// Write a single routing table by index — diagnostics: pinpoint which of the
     /// 3 sample-rate-band tables the device rejects.
     pub fn write_routing_table(
         &mut self,
         table_num: u16,
         data: &[u32],
     ) -> Result<(), TransportError> {
         let mut payload = Vec::with_capacity(4 + data.len() * 4);
         payload.extend_from_slice(&0u16.to_le_bytes());
         payload.extend_from_slice(&table_num.to_le_bytes());
         for v in data {
             payload.extend_from_slice(&v.to_le_bytes());
         }
         self.command(op::SET_MUX, &payload, 0)?;
         Ok(())
     }
 
     /// Build (but do NOT send) the per-table SET_MUX payload byte-vectors for a
     /// routing state — for inspection / dry-run verification before writing.
     pub fn dry_run_routing(tables: &[Vec<u32>]) -> Vec<Vec<u8>> {
         tables
             .iter()
             .enumerate()
             .map(|(table_num, data)| {
                 let mut payload = Vec::with_capacity(4 + data.len() * 4);
                 payload.extend_from_slice(&0u16.to_le_bytes());
                 payload.extend_from_slice(&(table_num as u16).to_le_bytes());
                 for v in data {
                     payload.extend_from_slice(&v.to_le_bytes());
                 }
                 payload
             })
             .collect()
     }
 
     /// Legacy single-table writer (kept for the unit tests / simple cases).
     pub fn set_mux(&mut self, entries: &[MuxEntry]) -> Result<(), TransportError> {
         let mut payload = Vec::with_capacity(4 + entries.len() * 4);
         payload.extend_from_slice(&0u16.to_le_bytes()); // pad
         payload.extend_from_slice(&0u16.to_le_bytes()); // num (start index)
         for e in entries {
             payload.extend_from_slice(&e.pack().to_le_bytes());
         }
         self.command(op::SET_MUX, &payload, 0)?;
         Ok(())
     }
 
     /// Set every crosspoint of every mix bus to silence (all inputs off). This
     /// is the bulk "clear mixer" — useful to tame a factory wall-of-unity matrix.
     /// `buses`/`inputs` are the device's mix dimensions.
     pub fn clear_mixer(&mut self, buses: u16, inputs: usize) -> Result<(), TransportError> {
         let silence = vec![0u16; inputs];
         for bus in 0..buses {
             self.set_mix(bus, &silence)?;
         }
         Ok(())
     }
 
     /// Read every mix bus into a `buses × inputs` grid of dB gains (for a UI
     /// refresh of the whole mixer matrix).
     pub fn read_mixer_db(
         &mut self,
         buses: u16,
         inputs: usize,
     ) -> Result<Vec<Vec<f32>>, TransportError> {
         let mut grid = Vec::with_capacity(buses as usize);
         for bus in 0..buses {
             let raw = self.get_mix(bus, inputs)?;
             grid.push(raw.into_iter().map(mixer_value_to_db).collect());
         }
         Ok(grid)
     }
 
     /// Set one crosspoint: input `input` → mix bus `bus` at `db`. Reads the bus's
     /// current levels, changes the one input, and writes the bus back.
     pub fn set_mix_point_db(
         &mut self,
         bus: u16,
         input: usize,
         db: f32,
         num_inputs: usize,
     ) -> Result<(), TransportError> {
         let mut levels = self.get_mix(bus, num_inputs)?;
         if let Some(slot) = levels.get_mut(input) {
             *slot = db_to_mixer_value(db);
         }
         self.set_mix(bus, &levels)
     }
 
     /// Snapshot `num_meters` metering points. Each level is a raw `u32`.
     pub fn get_meters(&mut self, num_meters: u16) -> Result<Vec<u32>, TransportError> {
         const METER_MAGIC: u32 = 1;
         let mut payload = Vec::with_capacity(8);
         payload.extend_from_slice(&0u16.to_le_bytes()); // pad
         payload.extend_from_slice(&num_meters.to_le_bytes());
         payload.extend_from_slice(&METER_MAGIC.to_le_bytes());
         let resp = self.command(op::GET_METER, &payload, num_meters as usize * 4)?;
         Ok(le_u32s(&resp.payload, num_meters as usize))
     }
 }
 
 fn le_u16s(bytes: &[u8], count: usize) -> Vec<u16> {
     bytes
         .chunks_exact(2)
         .take(count)
         .map(|c| u16::from_le_bytes([c[0], c[1]]))
         .collect()
 }
 
 fn le_u32s(bytes: &[u8], count: usize) -> Vec<u32> {
     bytes
         .chunks_exact(4)
         .take(count)
         .map(|c| u32::from_le_bytes([c[0], c[1], c[2], c[3]]))
         .collect()
 }
 
 #[cfg(test)]
 mod tests {
     use super::*;
     use crate::transport::mock::MockTransport;
 
     #[test]
     fn mixer_db_unity_and_extremes() {
         // 8192 is unity = 0 dB.
         assert!((mixer_value_to_db(8192) - 0.0).abs() < 0.05);
         assert_eq!(mixer_value_to_db(0), MIXER_MIN_DB);
         // round-trip 0 dB
         assert_eq!(db_to_mixer_value(0.0), 8192);
         // +12 dB is the ceiling
         assert!(db_to_mixer_value(20.0) <= db_to_mixer_value(MIXER_MAX_DB) + 1);
     }
 
     #[test]
     fn mixer_db_round_trips_within_quantization() {
         for &db in &[-60.0_f32, -20.0, -6.0, 0.0, 6.0, 12.0] {
             let v = db_to_mixer_value(db);
             let back = mixer_value_to_db(v);
             assert!((back - db).abs() < 0.5, "db {db} -> {v} -> {back}");
         }
     }
 
     #[test]
     fn read_mixer_db_builds_grid() {
         let mut m = MockTransport::new();
         // 2 buses × 2 inputs, all unity
         for _ in 0..2 {
             let mut p = Vec::new();
             p.extend_from_slice(&8192u16.to_le_bytes());
             p.extend_from_slice(&8192u16.to_le_bytes());
             m.push_response(op::GET_MIX, &p);
         }
         let mut dev = Scarlett::new(m);
         let grid = dev.read_mixer_db(2, 2).unwrap();
         assert_eq!(grid.len(), 2);
         assert!((grid[0][0]).abs() < 0.05); // ~0 dB
     }
 
     #[test]
     fn mux_entry_round_trips_through_packing() {
         // dest in low 12 bits, source in high 12 (kernel order)
         let e = MuxEntry { source: 5, dest: 9 };
         let packed = e.pack();
         assert_eq!(packed, 9 | (5 << 12));
         assert_eq!(MuxEntry::unpack(packed), e);
     }
 
     #[test]
     fn get_mix_requests_bus_and_parses_levels() {
         let mut m = MockTransport::new();
         // two inputs: levels 0x1000, 0x2000
         m.push_response(op::GET_MIX, &[0x00, 0x10, 0x00, 0x20]);
         let mut dev = Scarlett::new(m);
 
         let levels = dev.get_mix(3, 2).unwrap();
         assert_eq!(levels, vec![0x1000, 0x2000]);
 
         let m = dev.into_transport();
         assert_eq!(m.sent[0].0, op::GET_MIX);
         // request = mix_num(3) + count(2), both u16 LE
         assert_eq!(m.sent[0].1, vec![0x03, 0x00, 0x02, 0x00]);
     }
 
     #[test]
     fn set_mix_packs_bus_then_levels() {
         let mut m = MockTransport::new();
         m.push_response(op::SET_MIX, &[]);
         let mut dev = Scarlett::new(m);
 
         dev.set_mix(1, &[0xaabb, 0xccdd]).unwrap();
 
         let m = dev.into_transport();
         let (cmd, payload) = &m.sent[0];
         assert_eq!(*cmd, op::SET_MIX);
         assert_eq!(payload, &vec![0x01, 0x00, 0xbb, 0xaa, 0xdd, 0xcc]);
     }
 
     #[test]
     fn get_mux_parses_packed_entries() {
         let mut m = MockTransport::new();
         // dest|src<<12 : (dest 0, src 2) and (dest 3, src 7)
         let raw0 = (0u32 | (2 << 12)).to_le_bytes();
         let raw1 = (3u32 | (7 << 12)).to_le_bytes();
         let mut payload = Vec::new();
         payload.extend_from_slice(&raw0);
         payload.extend_from_slice(&raw1);
         m.push_response(op::GET_MUX, &payload);
         let mut dev = Scarlett::new(m);
 
         let entries = dev.get_mux(2).unwrap();
         assert_eq!(entries[0], MuxEntry { source: 2, dest: 0 });
         assert_eq!(entries[1], MuxEntry { source: 7, dest: 3 });
 
         let m = dev.into_transport();
         // request = num(0) + count(2)
         assert_eq!(m.sent[0].1, vec![0x00, 0x00, 0x02, 0x00]);
     }
 
     #[test]
     fn set_mux_writes_pad_num_then_packed_entries() {
         let mut m = MockTransport::new();
         m.push_response(op::SET_MUX, &[]);
         let mut dev = Scarlett::new(m);
 
         dev.set_mux(&[MuxEntry { source: 1, dest: 4 }]).unwrap();
 
         let m = dev.into_transport();
         let (cmd, payload) = &m.sent[0];
         assert_eq!(*cmd, op::SET_MUX);
         let entry = (4u32 | (1 << 12)).to_le_bytes(); // dest 4, source 1
         let mut expect = vec![0x00, 0x00, 0x00, 0x00]; // pad, num
         expect.extend_from_slice(&entry);
         assert_eq!(payload, &expect);
     }
 
     #[test]
     fn get_meters_sends_magic_and_parses_u32_levels() {
         let mut m = MockTransport::new();
         let mut payload = Vec::new();
         payload.extend_from_slice(&0x0000_1234u32.to_le_bytes());
         payload.extend_from_slice(&0x0000_5678u32.to_le_bytes());
         m.push_response(op::GET_METER, &payload);
         let mut dev = Scarlett::new(m);
 
         let meters = dev.get_meters(2).unwrap();
         assert_eq!(meters, vec![0x1234, 0x5678]);
 
         let m = dev.into_transport();
         let (cmd, sent) = &m.sent[0];
         assert_eq!(*cmd, op::GET_METER);
         // pad(0,u16) + num_meters(2,u16) + magic(1,u32)
         assert_eq!(sent, &vec![0x00, 0x00, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00]);
     }
 }